Concepts and Terms
3. Deposition & Thin Films
Deposition Methods
- Deposition - Adding thin layer of material onto substrate
- Physical Vapor Deposition (PVD) - Depositing via physical process (not chemical)
- Sputter deposition - Bombard target with ions; atoms knock off and deposit
- E-beam evaporation - Heat material with electron beam until it evaporates
- Thermal evaporation - Heat material with resistive heater
- Chemical Vapor Deposition (CVD) - Deposit via chemical reaction of gases
- Atomic Layer Deposition (ALD) - Deposit one atomic layer at a time; extremely conformal
- Molecular Beam Epitaxy (MBE) - Precisely controlled atomic layer growth
- Epitaxy - Growing crystalline layer with same crystal structure as substrate
Film Properties
- Thin film - Layer of material from nm to μm thick
- Thickness - How thick the deposited layer is
- Uniformity - How consistent thickness is across substrate
- Conformality - How well film coats 3D structures (ALD is best)
- Step coverage - Related to conformality; coverage over steps
- Grain - Crystal region in polycrystalline film
- Grain boundary - Interface between grains (often weak spots)
- Amorphous - Non-crystalline (random atomic arrangement)
- Crystalline - Ordered atomic structure
- Polycrystalline - Many small crystals (grains)
Deposition Terminology
- Target - Material being sputtered from
- Substrate - Wafer/chiplet being coated
- Precursor - Chemical used in CVD/ALD
- Self-limiting - Process that stops after one layer (characteristic of ALD)
- Conformal coating - Uniform thickness coating on 3D surfaces
Speech Content
Deposition and Thin Films: Core Concepts and Industry Insights
Let's start with a rapid overview of what we'll cover: physical vapor deposition including sputtering and evaporation, chemical vapor deposition and its variants, atomic layer deposition and its exceptional conformality, molecular beam epitaxy for precise crystal growth, the critical properties of thin films like grain structure and stress, the economics and equipment landscape, and finally novel opportunities for lunar manufacturing and competing with TSMC in the West.
Deposition is the process of adding thin layers of material onto a substrate, typically a silicon wafer. These layers range from nanometers to micrometers in thickness and form the building blocks of semiconductor devices: gate stacks, interconnects, barriers, and passivation layers. There are two fundamental approaches: physical vapor deposition, where material is physically transferred to the substrate, and chemical vapor deposition, where gases react to form solid films.
Let's dive into physical vapor deposition, or PVD. The workhorse of PVD is sputter deposition. Here's how it works: you have a target made of the material you want to deposit, let's say aluminum or tantalum. This target sits in a vacuum chamber held at low pressure, around one to ten milli-Torr. You introduce an inert gas, typically argon, and apply a high voltage, three hundred to one thousand volts. This creates a plasma where argon atoms are ionized into positively charged ions. These ions accelerate toward the negatively charged target and bombard it with enough energy to knock atoms off the surface through momentum transfer. These ejected atoms travel ballistically through the vacuum and land on your substrate wafer, building up a thin film atom by atom.
For conductive targets, you use DC sputtering, just a direct current. For insulators, you need RF sputtering at thirteen point five six megahertz to prevent charge buildup on the target surface. A major improvement came with magnetron sputtering, which uses magnetic fields to trap electrons near the target surface. This increases the ionization efficiency by ten to one hundred times, boosting deposition rates to one to ten nanometers per second. The directional nature of sputtering gives you step coverage around thirty to fifty percent, meaning if you have a trench or via, the sidewalls get coated much thinner than the top surface.
Equipment costs are substantial: an Applied Materials Endura system runs three to five million dollars. Target materials vary widely in cost. Aluminum is cheap at around fifty dollars per kilogram. Tantalum runs about three hundred dollars per kilogram, while platinum hits thirty thousand dollars per kilogram. These tools require ultra-high vacuum with base pressures around ten to the minus ninth Torr to minimize contamination.
The physics of sputtering matters for film quality. The energy distribution of arriving atoms affects stress and grain structure. Low energy bombardment yields porous films; high energy creates dense films with compressive stress. You need to balance this carefully because tensile stress causes cracking while compressive stress leads to peeling or buckling.
Electron beam evaporation, or e-beam evaporation, takes a different approach. You focus a high-power electron beam, typically five to ten kilowatts at six to ten kilo electron volts, onto source material sitting in a water-cooled crucible. When the surface temperature reaches the vapor pressure point, around ten to the minus second Torr, material evaporates. Atoms travel in straight lines with much lower thermal energies, point one to point three electron volts, compared to sputtering. This gives you deposition rates from point one to one hundred nanometers per second.
E-beam evaporation is excellent for lift-off processes because of this directional shadowing effect, but step coverage is even worse than sputtering, only around ten percent. You can deposit most metals and some compounds, though compounds often decompose rather than evaporate intact. Systems cost two hundred thousand to two million dollars and need base pressures of ten to the minus sixth or ten to the minus seventh Torr. Multi-pocket sources let you deposit different materials sequentially without breaking vacuum, which is crucial for complex stacks.
Thermal evaporation is simpler still: resistive heating of source material using tungsten boats or tantalum foils. It's much cheaper, fifty to two hundred thousand dollars, but limited to low melting point materials below fifteen hundred degrees Celsius. This works fine for aluminum, gold, and silver, but step coverage is even worse than e-beam.
Now let's move to chemical vapor deposition, or CVD. This is fundamentally different: gaseous precursors flow into a heated chamber and react at the substrate surface to deposit a solid film. Typical substrate temperatures range from three hundred to one thousand degrees Celsius. There are two key regimes. At high temperatures, the reaction happens faster than precursors can be delivered, so you're mass transport limited. At low temperatures, surface reaction kinetics dominate, and you're reaction limited.
Precursor chemistry is fascinating and expensive. For silicon films, you use silane, which is S-i-H-4. For tungsten, you might use tungsten hexafluoride with hydrogen. For silicon dioxide, TEOS, which stands for tetraethylorthosilicate, is common. These chemicals cost anywhere from twenty to five hundred dollars per liter or kilogram and are often toxic, pyrophoric, or corrosive, requiring extensive safety systems and exhaust scrubbing.
Low pressure CVD, or LPCVD, operates at point one to ten Torr. These are furnace-based batch systems that can process twenty-five to one hundred fifty wafers simultaneously. You get excellent uniformity, typically better than two percent across the wafer, and high throughput. Step coverage is much better than PVD, around seventy to ninety percent, because the gases flow conformally around three-dimensional structures. Polysilicon gate electrodes are deposited at six hundred degrees Celsius from silane. Silicon nitride forms at eight hundred degrees Celsius from dichlorosilane plus ammonia. These furnaces from ASM or Kokusai cost one to three million dollars.
Plasma-enhanced CVD, or PECVD, uses RF power at thirteen point five six megahertz or forty kilohertz to generate a plasma that activates the precursor gases. This enables lower temperature deposition, two hundred to four hundred degrees Celsius, which is critical when you already have temperature-sensitive structures on the wafer. The trade-off is that you get hydrogen incorporation and lower density films compared to thermal CVD. Applied Materials Producer tools run two to four million dollars.
CVD challenges include managing film stress, which comes from both the growth process itself and thermal expansion mismatches when you cool down. Non-uniformity arises from gas depletion as precursors get consumed, and you can get particle generation from unwanted gas-phase nucleation. Despite these challenges, CVD's conformality makes it essential for filling trenches and vias.
Atomic layer deposition, or ALD, is the most precise deposition technique. It uses a binary reaction sequence that's self-limiting. Here's the cycle: First, you expose the substrate to precursor A until the surface is completely saturated with a monolayer. Second, you purge the chamber to remove excess precursor. Third, you expose to precursor B, which reacts with the surface species from precursor A. Fourth, you purge again. Each cycle deposits one atomic layer, point one to one Angstrom. You repeat this cycle hundreds or thousands of times to build up the desired thickness.
The self-limiting nature is key: once the surface is saturated, no more reaction occurs until you introduce the second precursor. This gives you atomic-level thickness control, plus or minus point one nanometers, and exceptional conformality, greater than ninety-five percent even in high aspect ratio trenches with fifty to one depth to width ratios. The temperature window is typically one hundred fifty to four hundred degrees Celsius, where both reactions are self-limiting but still thermally activated enough to proceed at reasonable rates.
Common ALD chemistries include aluminum oxide from trimethylaluminum plus water, hafnium oxide from TDMAH plus water, and titanium nitride from titanium tetrachloride plus ammonia. Precursors are expensive, two hundred to two thousand dollars per kilogram, due to extreme purity requirements. Equipment from Cambridge Nanotech or Oxford Instruments runs three hundred thousand to one million dollars. Plasma-enhanced ALD, or PEALD, uses plasma for the second reactant, enabling lower temperatures and a broader material library.
ALD's advantages are remarkable for advanced nodes: pinhole-free films below ten nanometers, perfect for high-k dielectrics in FinFETs, conformal liners in DRAM capacitors, and through-silicon via coatings. The disadvantages? It's slow, ten to one hundred times slower than CVD, precursors are costly, and the material library is still limited compared to CVD. Throughput is a major challenge for high-volume manufacturing.
Spatial ALD is an emerging solution where the substrate moves between precursor zones separated by inert gas curtains or purge regions. This eliminates the purge step time and can increase throughput significantly. Companies like Beneq and SPTS are developing spatial tools.
Molecular beam epitaxy, or MBE, operates in ultra-high vacuum, ten to the minus tenth to ten to the minus eleventh Torr. Effusion cells, also called Knudsen cells, heat elemental sources to create molecular beams of atoms that travel in straight lines to the heated substrate, typically four hundred to eight hundred degrees Celsius. Growth rates are very slow, point one to three Angstroms per second. You monitor the process in real-time using RHEED, reflection high-energy electron diffraction, which shows the crystal quality of the growing surface.
MBE enables extraordinarily abrupt interfaces, just one to two atomic monolayers, precise doping control where you can change dopant concentration on a layer-by-layer basis, and complex heterostructures like quantum wells and superlattices. The technique is crucial for three-five semiconductors like gallium arsenide and indium phosphide, two-six materials like cadmium telluride, and group four alloys like silicon germanium.
Source purity is critical: six nines to seven nines purity, meaning ninety-nine point nine nine nine nine to ninety-nine point nine nine nine nine nine percent. Gallium costs about three hundred dollars per kilogram at six nines purity, indium is around five hundred dollars per kilogram, and arsenic, which is hazardous, is about one hundred dollars per kilogram. Equipment from Veeco or Riber costs one to three million dollars. MBE is primarily used for R and D and specialty applications like semiconductor lasers, high electron mobility transistors, and quantum devices, due to its low throughput.
Epitaxy more broadly means growing a crystalline layer with a crystal structure that matches the substrate. Homoepitaxy is growing the same material, like silicon on silicon. Heteroepitaxy is different materials, like silicon germanium on silicon or gallium nitride on sapphire. Lattice mismatch between the film and substrate causes strain. If the mismatch exceeds about two percent, you typically get defects called dislocations that degrade device performance. But controlled strain can actually enhance carrier mobility, which is exploited in modern transistors.
CVD epitaxy is most common for silicon. You use silane plus hydrogen chloride at eleven hundred degrees Celsius, or trichlorosilane chemistry. Equipment from ASM Epsilon runs three to five million dollars. Epitaxy is critical for silicon carbide power devices and for growing strained silicon germanium source and drain regions in advanced logic transistors.
Let's talk about film properties in depth. Thin films are characterized by their thickness, uniformity across the wafer, grain structure, and stress. Polycrystalline films consist of many small crystals called grains. The interfaces between grains are grain boundaries, which are high-energy defects with broken bonds, impurity segregation, and fast diffusion paths. Grain boundaries reduce electrical conductivity through electron scattering, weaken mechanical strength, and can be sites for corrosion.
Grain size is controlled by deposition conditions. Higher energy bombardment yields larger grains. You can also anneal films after deposition to increase grain size through grain boundary migration. Film stress is characterized as intrinsic, which comes from the growth process itself, or extrinsic, which comes from thermal expansion mismatch when you heat or cool the wafer. You measure stress by wafer curvature using the Stoney equation. Controlling stress is critical to prevent cracking or peeling. You adjust deposition parameters like pressure, power, and temperature, use post-deposition annealing, or design multilayer stacks where stresses balance out.
Uniformity is typically specified as one standard deviation percentage across the wafer. Production requires better than two percent. Non-uniformity comes from gas flow patterns, temperature gradients, and source geometry. You improve uniformity by rotating the substrate, optimizing gas injection ring designs, and using multiple-zone heating.
Conformality is the ratio of sidewall thickness to top surface thickness on three-dimensional structures. PVD gives you thirty to fifty percent, CVD seventy to ninety percent, and ALD greater than ninety-five percent. High aspect ratio structures like gate-all-around transistors and DRAM capacitors require ALD or highly specialized CVD processes.
The industry landscape is dominated by a few key equipment vendors. Applied Materials makes the Endura PVD platform and the Producer PECVD system. Lam Research makes the VECTOR PVD and ALTUS tungsten CVD systems. ASM International specializes in Epsilon epitaxy and ALD tools. Tokyo Electron provides CVD and PVD systems. Veeco is the leader in MBE. These equipment makers represent about fifteen percent of total fab capital costs. Lead times are six to eighteen months, and there are often duopolies in specific segments, giving vendors significant pricing power.
Precursors and materials come from Merck, Air Liquide, Linde, and Praxair for CVD and ALD gases. TOSOH is a major supplier of sputtering targets. High-purity materials are often single-sourced, and qualification cycles take one to two years, creating substantial switching costs. This supply chain concentration is a strategic vulnerability.
Cost structures vary dramatically by deposition type. PVD films cost fifty cents to two dollars per wafer, CVD one to five dollars per wafer, and ALD five to twenty dollars per wafer. ALD's high cost comes from long cycle times and expensive precursors. Throughput also varies: PVD and CVD process thirty to sixty wafers per hour, while ALD is only one to five wafers per hour. Cost of ownership includes not just capital equipment but consumables like sputtering targets, precursor gases, and chamber cleaning.
Historically, deposition technology has evolved with device scaling. In the nineteen sixties and seventies, thermal evaporation dominated. The nineteen eighties saw sputtering displace evaporation because it offered better step coverage and could deposit alloys uniformly. The nineteen nineties brought LPCVD polysilicon gates and tungsten plugs via CVD. The two thousands were transformative: high-k dielectrics required ALD adoption, with hafnium oxide replacing silicon dioxide at the forty-five nanometer node in two thousand seven. The twenty tens saw ALD expand to spacer layers and the emergence of selective deposition. The overall trend has been from directional techniques toward conformal techniques as features have shrunk and aspect ratios have increased.
Some abandoned approaches are worth reconsidering. Electroplating was initially rejected for interconnects due to non-uniformity, but was revived for copper damascene processes because CVD copper proved too challenging. Ion beam deposition was too slow for manufacturing. Laser ablation PVD had uniformity issues but might be worth revisiting with multi-beam systems. CVD aluminum from trimethylaluminum plus hydrogen reduction was abandoned due to particle generation, and aluminum sputtering remains preferred.
Let's explore the open challenges and novel opportunities in deposition. Selective deposition is perhaps the most exciting frontier. If you can deposit material only on desired surfaces, say metal but not dielectric, you can create self-aligned processes and eliminate patterning steps. Area-selective ALD uses surface functionalization with self-assembled monolayers or inhibitor molecules like aniline or acetylacetone to block deposition on certain areas. The challenge is that selectivity degrades with thickness as nucleation eventually occurs on non-growth surfaces. An opportunity here is using AI to design inhibitor molecules for specific material pairs, perhaps with in-situ monitoring to detect when selectivity is degrading.
Sub-nanometer thickness control is critical for atomically thin channels using transition metal dichalcogenides or graphene, and for engineering interfaces. ALD is promising, but precursor design is limiting. Computational chemistry combined with high-throughput screening could accelerate discovery of new precursors.
Low temperature deposition, below four hundred degrees Celsius, is essential for back-end processing and heterogeneous integration where you're building on top of temperature-sensitive structures. PEALD and spatial ALD are making progress, but film quality in terms of density and impurity content still lags high-temperature processes. Radical-enhanced ALD, where you independently control reactant species via plasma, or photon-assisted ALD using UV activation, could help.
High throughput ALD remains a major challenge. Spatial ALD architectures, batch ALD systems, and potentially roll-to-roll for flexible electronics are all being explored. AI-optimized spatial reactor designs that maximize separation between precursor zones while minimizing substrate travel distance could be transformative.
In-situ monitoring during deposition is limited today. MBE has RHEED for crystal quality. Others rely on post-deposition metrology. Real-time thickness monitoring via ellipsometry or reflectometry, composition via X-ray photoelectron spectroscopy, and stress via wafer curvature could enable closed-loop process control. Machine learning could predict final film properties from deposition signatures, enable predictive maintenance, and automatically adjust recipes.
Novel materials are another frontier. Two-dimensional materials like molybdenum disulfide and tungsten diselenide need entirely new deposition processes. Nitrides like aluminum nitride for gallium nitride power devices, oxides like gallium oxide for ultra-high voltage devices, and perovskites for various applications each require precursor development and process optimization. High-throughput experimentation with robotic wafer handling could accelerate this by testing hundreds of conditions per week instead of dozens.
Now let's consider the lunar manufacturing perspective. The Moon offers extraordinary advantages for deposition. The native ultra-high vacuum of ten to the minus twelfth Torr eliminates the need for vacuum pumps in PVD and MBE. There are no base pressure concerns, no chamber leaks, and you can maintain wafers in vacuum continuously from deposition through final packaging. This eliminates oxidation and contamination issues. You could design a cluster tool where all processes happen under native vacuum with wafers never exposed to atmosphere.
The scarcity of volatiles on the Moon is a major challenge. CVD and ALD require hydrogen, ammonia, oxygen, and hydrocarbons, all of which are scarce. Recycling and capture become essential. PVD has an advantage here: it only requires inert sputtering gas, and you might recycle argon or even use helium-3 extracted from lunar regolith. Water from polar ice can provide oxygen and hydrogen through electrolysis. In-situ resource utilization becomes critical. Lunar regolith contains silicon, aluminum, titanium, iron, calcium, and magnesium. You could theoretically produce sputtering targets on-site. Aluminum comprises about fourteen percent of highland anorthosite. Titanium is abundant in mare basalts as ilmenite. Silicon is forty percent of regolith as silicon dioxide.
The challenge is refining these elements to six nines purity or better. Zone refining in vacuum and potentially low gravity could be advantageous, but this is a major technical hurdle. An interesting opportunity is developing deposition processes that tolerate lower purity targets, perhaps three nines or four nines instead of six nines, by compensating with better process control or post-deposition purification steps.
Temperature control is actually easier on the Moon. In vacuum, there's no convection, only radiative heating and cooling. This enables very precise temperature maintenance and allows extreme temperatures without complex chamber designs.
Vacuum packaging is revolutionary for lunar manufacturing. If chips will run in vacuum, you don't need passivation layers. You can use vacuum itself as a dielectric, which has infinite breakdown voltage. Hermetic sealing happens in the native vacuum environment. This eliminates multiple CVD oxide and nitride passivation steps, dramatically simplifying the process flow.
Process simplification becomes paramount. A PVD-heavy process eliminates complex gas handling systems for CVD. You could sputter-deposit dielectrics instead of using CVD. Use MBE for active semiconductor layers, leveraging the native UHV. Single-chamber multi-step processing without venting means no repeated pumpdowns. The lack of airborne particles means you don't need cleanrooms for deposition, just sealed transfer systems.
Contamination is actually easier to manage: no water vapor, no airborne organics. The challenges are outgassing from equipment materials and handling contamination during the minimal human interactions required.
For competing with TSMC in the West, equipment sourcing is more favorable than for lithography. Most deposition tools come from US companies like Applied Materials and Lam Research, or from European and Japanese suppliers. There's less dependence on China compared to some other process steps. You might even vertically integrate commodity PVD tools, which are relatively simple mechanically, while outsourcing complex ALD and epitaxy to established vendors.
Precursor supply exists in Europe and the US but at smaller scale than Asia. Long-term contracts and potentially domestic precursor production for high-value ALD chemicals could reduce supply chain risk. Partnering with synthetic chemistry groups to develop alternative precursors is strategic.
Process simplification is key to competing. Minimize ALD use where possible since it's a throughput bottleneck. Use CVD wherever conformality is sufficient. Employ selective deposition to reduce patterning steps. Use thicker barriers and liners where design rules allow. AI-optimized CVD recipes might match ALD conformality in some cases, and generative design could discover new CVD chemistries.
For a chiplet strategy, deposition is critical. Hybrid bonding requires ultra-smooth surfaces and integration with chemical mechanical polishing. Micro-bumps need PVD barrier and seed layers. Through-silicon vias need conformal liners. Specializing in deposition processes for advanced packaging could provide differentiation and support a chiplet ecosystem.
Vacuum integration across multiple process steps is transformative. Keep wafers in vacuum from deposition through bonding and final packaging. Use vacuum-insulated interconnects, eliminating the need for low-k dielectrics with their integration challenges. This requires cluster tool design with deposition, lithography, etch, and bonding all under vacuum. The payoff is a radically simplified process flow with fewer steps and higher yields.
Cold welding, where clean metal surfaces bond directly in vacuum at room temperature or slightly elevated temperatures, enables fine-pitch interconnects without thick bonding layers. You need ultra-clean surfaces, which means in-situ surface preparation like light sputter cleaning followed by bonding, all in a vacuum cluster tool. This could be a major differentiator.
Talent sourcing is feasible. US universities like Stanford, MIT, and Berkeley have strong deposition expertise. National labs like NREL and Sandia specialize in ALD. You can recruit former Intel and TSMC engineers, employees from equipment vendors like Applied and Lam, and academic researchers. Remote work enables tapping retiring engineers for consulting. Europe has particular strength in MBE for three-five materials and ALD, especially in Finland and the Netherlands.
AI opportunities are vast. Deposition has an enormous parameter space: temperature, pressure, RF power, gas flow rates, pulsing sequences, substrate rotation. Reinforcement learning can do multi-objective optimization, balancing uniformity, stress, throughput, and film quality. Generative models can propose new precursor molecules. Computer vision can do in-situ defect detection from plasma emission or reflected light. Predictive maintenance uses sensor fusion to forecast equipment failures. Autonomous experimentation with robotic wafer handling could accelerate process development by an order of magnitude.
Simulation is increasingly powerful. COMSOL and Silvaco model CVD reactors, capturing gas flow, temperature fields, and reaction kinetics. Atomistic simulations using density functional theory and molecular dynamics can model ALD surface reactions, grain growth, and stress evolution. The opportunity is to create a digital twin of your deposition chamber for virtual process development, dramatically reducing the number of physical experiments needed. Combine this with AI for closed-loop optimization.
Mature robotics would transform deposition economics and capabilities. Throughput increases by eliminating manual wafer handling delays and optimizing tool utilization. Robots could serve multiple tools in parallel. Faster target changes in PVD, which currently require four to eight hours of manual downtime, could happen in under an hour. This alone could increase effective tool capacity by two to three times.
Complexity becomes manageable. Robots enable sequences with ten or more sequential depositions that would be manually impractical. Automated in-situ metrology between steps provides real-time feedback. Robotic transfer between vacuum chambers without venting enables the vacuum-integrated process flows we discussed.
Economics improve substantially. Labor represents about fifteen percent of fab operating expenses. Reduction in headcount, smaller fab footprints from denser tool layouts, and fewer tools needed due to higher utilization all contribute. This makes economical specialty and low-volume production viable, which is perfect for chiplets and custom ASICs.
Scalability becomes easier. Capacity expansion is adding robots rather than hiring and training staff. Recipe replication across tools is instantaneous and perfect. This enables fast fab ramp-up and reduces time to market for new products.
Quality improves through elimination of human handling errors and contamination. Consistent process execution reduces variability. This is especially important for sensitive processes like ALD where even minor deviations affect film quality.
R and D accelerates dramatically. High-throughput combinatorial deposition, where you test multiple conditions on a single wafer using shadow masks or gradient methods, combined with autonomous learning systems, could discover novel materials and processes ten to one hundred times faster than today.
Let's discuss some creative ideas from the past worth revisiting. Ionized PVD, developed in the nineteen nineties and two thousands, uses plasma between the target and substrate to ionize sputtered atoms. Magnetic fields then steer these ions for improved bottom coverage in vias. It's used in some copper barrier applications but could be extended to more materials with AI-optimized plasma and magnetic field designs.
Hot-wire CVD uses a heated filament at fifteen hundred to two thousand degrees Celsius to dissociate precursor gases, enabling low substrate temperature deposition. It's used in amorphous silicon solar cells but was abandoned in integrated circuits due to uniformity and contamination concerns. Modern refractory carbide filament materials and localized deposition for single die processing could make this viable, especially to eliminate plasma damage in sensitive devices.
Liquid injection CVD delivers precursors as an aerosol or mist, enabling use of non-volatile precursors that can't be delivered as gases. The challenge has been droplet uniformity. High-throughput screening of liquid precursor libraries combined with ultrasonic or inkjet nebulizers for precise droplet control could unlock this.
Supercritical fluid deposition uses supercritical carbon dioxide as a solvent and transport medium. It offers excellent conformality and low temperature operation. Explored in the two thousands, it saw limited adoption. Revival for filling porous low-k dielectrics or depositing on sensitive two-dimensional materials, combined with AI recipe optimization, could be compelling.
Electrochemical ALD uses underpotential deposition for atomic layer control of metal films like copper and platinum. It's been demonstrated but has a limited material library. Extension to oxides and nitrides via surface-limited electrochemical reactions, potentially in aqueous solutions for safety, is worth exploring.
Pulsed laser deposition uses a laser to ablate a target, depositing highly energetic species that can form complex stoichiometries and metastable phases. It's great for research on complex oxides and superconductors but suffers from poor uniformity at large scales. Multi-beam systems for large area uniformity or using it for combinatorial screening could be valuable.
Molecular layer deposition is an ALD-like process for organic and hybrid organic-inorganic films. Pure organic films are possible, which is interesting for flexible electronics and low-k dielectrics. Novel tailored dielectrics, sacrificial layers, and etch stops with specific chemical reactivity could be designed.
Filtered cathodic arc deposition produces very high ionization, nearly one hundred percent, and energetic deposition for excellent adhesion and dense films. Macroparticle contamination is the main issue. Improved electromagnetic filtering could make this viable for ultra-thin diffusion barriers and hard masks.
Selective area epitaxial growth, where epitaxy occurs only in patterned openings with a dielectric mask elsewhere, has been demonstrated for three-five semiconductors on silicon. Challenges include mask compatibility and defect formation. For heterogeneous integration, this could eliminate the epitaxy-then-etch approach, and enable direct growth of nanowire arrays for three-dimensional devices.Vapor-liquid-solid
growth uses a catalytic droplet, traditionally gold, to enable low-temperature silicon nanowire growth. It was explored in the two thousands but faced contamination concerns from gold. Alternative catalysts like aluminum or gallium, combined with in-situ catalyst removal, could enable direct integration for three-dimensional NAND channels or gate-all-around devices.
Atmospheric pressure spatial ALD operates without vacuum, using a moving substrate under precursor zones separated by nitrogen curtains. Throughput is much higher, and it's compatible with roll-to-roll for flexible substrates. For MEMS, sensors, and packaging applications, or even for integrated circuit periphery with improved gas curtain design, this could be economical.
Plasma-enhanced MBE combines MBE's precision with plasma activation for lower temperatures and a broader material library. Growing gallium nitride at reduced temperature or oxides without oxidizers could be enabled.
Current research frontiers include radical-enhanced ALD with independent control of reactant species, photo-assisted ALD using UV activation, area-selective deposition via topography-selective precursors that preferentially adsorb on certain geometries, quasi-ALD that's not strictly self-limiting but achieves high conformality, super-conformal CVD with additives that cause preferential bottom-up fill, self-assembled monolayers as growth templates, integration of atomic layer etching with deposition for surface smoothing, and in-operando characterization like X-ray photoelectron spectroscopy or X-ray diffraction during deposition for mechanistic insight.
To summarize the key concepts we've covered: Physical vapor deposition including sputter deposition with its thirty to fifty percent step coverage and magnetron enhancements, e-beam and thermal evaporation with their directional nature. Chemical vapor deposition with LPCVD batch processing and PECVD's lower temperatures, achieving seventy to ninety percent step coverage. Atomic layer deposition's self-limiting binary cycle giving atomic precision and greater than ninety-five percent conformality but at low throughput and high cost. Molecular beam epitaxy's ultra-high vacuum and atomic layer control for perfect heterostructures. Film properties including grain boundaries as defect sites, stress management, conformality requirements for high aspect ratio features. The economics: PVD costs fifty cents to two dollars per wafer, CVD one to five dollars, ALD five to twenty dollars. Equipment vendors dominated by Applied Materials, Lam Research, and ASM. Historical evolution from thermal evaporation to sputtering to conformal CVD and finally atomic layer deposition as devices scaled. Lunar manufacturing opportunities leveraging native ultra-high vacuum, in-situ resource utilization of regolith, vacuum packaging eliminating passivation. Western fab competition through equipment sourcing advantages, process simplification, AI-driven optimization, vacuum integration, and cold welding for chiplets. Robotics enabling higher throughput, managing complexity, improving economics, and accelerating R and D. Novel opportunities in selective deposition, high-throughput ALD, in-situ monitoring, and revisiting techniques like ionized PVD, supercritical fluid deposition, and atmospheric spatial ALD with modern capabilities.
Technical Overview
Deposition & Thin Films: Technical Overview
Physical Vapor Deposition (PVD)
Sputter Deposition: Uses plasma containing inert gas ions (typically Ar+) accelerated by electric field (300-1000V) to bombard target material. Momentum transfer ejects atoms/clusters from target surface with energies 1-100eV. Ejected atoms travel ballistically through low pressure environment (1-10 mTorr) to substrate. DC sputtering for conductors; RF sputtering (13.56 MHz) for insulators to prevent charge buildup. Magnetron sputtering uses magnetic field to trap electrons near target, increasing ionization efficiency 10-100x and deposition rates to 1-10 nm/s. Step coverage typically 30-50% due to directional nature. Target materials cost varies: aluminum ~$50/kg, tantalum ~$300/kg, platinum ~$30,000/kg. Equipment: Applied Materials Endura ($3-5M), requires ultrahigh vacuum (10^-9 Torr base pressure). Key physics: energy distribution affects film stress, grain structure; low energy yields porous films, high energy yields dense films with compressive stress.
E-beam Evaporation: Electron beam (5-10 kW, 6-10 keV) focused onto source material in water-cooled crucible. Material evaporates when surface reaches vapor pressure ~10^-2 Torr. Atoms travel in line-of-sight with thermal energies (0.1-0.3 eV), much lower than sputtering. Deposition rates 0.1-100 nm/s. Excellent for lift-off processes due to shadowing. Poor step coverage (~10%). Sources: tungsten boats for low-temp materials, graphite/ceramic crucibles for refractories. System cost $200K-$2M. Base pressure 10^-6 to 10^-7 Torr. Multi-pocket sources enable sequential deposition without breaking vacuum. Limited to materials with sufficient vapor pressure; cannot deposit compounds (they decompose).
Thermal Evaporation: Resistive heating of source material (tungsten boats, tantalum foils). Simpler than e-beam, lower cost ($50-200K), but limited to low melting point materials (<1500°C). Common for aluminum, gold, silver. Even worse step coverage than e-beam.
Chemical Vapor Deposition (CVD)
Gaseous precursors react at heated substrate surface (300-1000°C) to deposit solid film. Key regimes: (1) mass transport limited (high temp, reaction faster than delivery), (2) surface reaction limited (low temp, kinetics dominate). Precursor examples: SiH4 for Si, WF6 + H2 for tungsten, TEOS for SiO2. Pressure ranges: atmospheric (APCVD), low pressure 0.1-10 Torr (LPCVD), plasma enhanced (PECVD) enables lower temps 200-400°C via plasma activation. Step coverage 70-90% for LPCVD due to conformal gas flow.
LPCVD: Furnace-based, batch processing 25-150 wafers. Excellent uniformity (<2%), high throughput. Polysilicon at 600°C from silane, silicon nitride at 800°C from dichlorosilane + ammonia. Equipment: ASM/Kokusai furnaces $1-3M.
PECVD: Single-wafer, parallel plate reactors. RF power (100-1000W, 13.56 MHz or 40 kHz) generates plasma. Lower temperature enables deposition on temperature-sensitive structures. Trade-off: hydrogen incorporation, lower density films. Applied Materials Producer ($2-4M).
CVD Challenges: Precursor cost (TEOS $20-50/L, TMG $500/kg), toxic/pyrophoric gases require scrubbing, particle generation from gas-phase nucleation, non-uniformity from gas depletion. Film stress management critical (tensile vs compressive affects cracking/peeling).
Atomic Layer Deposition (ALD)
Self-limiting binary reaction sequence: (1) Precursor A exposure until surface saturation, (2) Purge, (3) Precursor B exposure for reaction with surface species, (4) Purge. Repeat for desired thickness. Growth rate 0.1-1 Å/cycle. Exceptional conformality (>95% in high aspect ratio trenches 50:1+). Temperature window 150-400°C where both reactions are self-limiting but thermally activated.
Key ALD Chemistries: Al2O3 from TMA (trimethylaluminum) + H2O; HfO2 from TDMAH + H2O; TiN from TiCl4 + NH3. Precursor costs high ($200-2000/kg) due to purity requirements. Equipment: plasma-enhanced ALD (PEALD) uses plasma for second reactant, enabling lower temps and new materials. Cambridge NanoTech/Oxford Instruments $300K-$1M. Spatial ALD uses moving substrate between precursor zones for higher throughput.
ALD Advantages: Precise thickness control (±0.1 nm), pinhole-free films at <10 nm, excellent conformality for 3D structures (FinFETs, DRAM capacitors, TSVs). Disadvantages: Slow (10-100x slower than CVD), expensive precursors, limited material library, throughput challenges for manufacturing.
Molecular Beam Epitaxy (MBE)
Ultra-high vacuum (10^-10 to 10^-11 Torr) deposition of crystalline layers. Effusion cells (Knudsen cells) heat elemental sources to create molecular beams. Substrate temperature 400-800°C. Growth rates 0.1-3 Å/s. RHEED (reflection high-energy electron diffraction) for real-time monitoring of crystal quality. Enables abrupt interfaces (1-2 monolayers), precise doping control, complex heterostructures.
Materials: III-V semiconductors (GaAs, InP, GaN), II-VI (CdTe), Group IV (Si-Ge). Source purity requirements: 6N-7N (99.9999-99.99999%). Gallium $300/kg (6N), indium $500/kg, arsenic $100/kg (hazardous). Equipment cost $1-3M (Veeco, Riber). Primarily R&D and specialty applications (lasers, HEMTs, quantum devices) due to low throughput.
Epitaxy
Growing crystalline layer matching substrate crystal structure. Homoepitaxy: same material (Si on Si). Heteroepitaxy: different material (SiGe on Si, GaN on sapphire). Lattice mismatch causes strain; >2% mismatch typically creates defects (dislocations). Strain engineering for mobility enhancement. Techniques: vapor phase epitaxy (VPE), liquid phase epitaxy (LPE), solid phase epitaxy (SPE). CVD epitaxy most common for Si (SiH4 + HCl at 1100°C, trichlorosilane chemistry). Equipment: ASM Epsilon ($3-5M). Critical for power devices (SiC epitaxy), advanced logic (SiGe source/drain).
Film Properties Deep Dive
Grain Boundaries: In polycrystalline films, grain boundaries are high-energy defects with broken bonds, impurity segregation, fast diffusion paths. Affect electrical conductivity (electron scattering), mechanical strength, corrosion resistance. Grain size controlled by deposition conditions: higher energy → larger grains. Annealing increases grain size via grain boundary migration.
Stress: Intrinsic (growth-related) and extrinsic (thermal expansion mismatch). Tensile stress can cause cracking; compressive stress causes peeling/buckling. Measured by wafer curvature (Stoney equation). Controlled via deposition parameters (pressure, power, temperature), post-deposition annealing, multilayer stacks.
Uniformity: Critical for device performance consistency. Non-uniformity sources: gas flow patterns, temperature gradients, source geometry. Specified as 1σ% across wafer, typically <2% for production. Improved by rotating substrate, optimizing gas injection, multiple-zone heating.
Conformality: Ratio of sidewall thickness to top surface thickness. PVD: 30-50%, CVD: 70-90%, ALD: >95%. High aspect ratio structures (GAA transistors, DRAM) require ALD or specialized CVD.
Industry Landscape
Equipment Vendors: Applied Materials (Endura PVD, Producer PECVD), Lam Research (VECTOR PVD, ALTUS tungsten CVD), ASM International (Epsilon epitaxy, ALD), Tokyo Electron (CVD, PVD), Veeco (MBE). Equipment represents ~15% of fab capital cost. Lead times 6-18 months. Duopoly in many segments.
Materials/Precursors: Merck, Air Liquide, Linde, Praxair for CVD/ALD gases. TOSOH for sputtering targets. High-purity materials often single-sourced. Long qualification cycles (1-2 years) create switching costs.
Cost Structure: PVD films $0.50-2/wafer, CVD $1-5/wafer, ALD $5-20/wafer. ALD expensive due to cycle time, precursor costs. Throughput: PVD/CVD 30-60 wafers/hour, ALD 1-5 wafers/hour. Cost of ownership includes consumables (targets, gases, chamber cleaning).
Historical Evolution
1960s-70s: Thermal evaporation dominant. 1980s: Sputtering displaced evaporation for better step coverage, alloy deposition. 1990s: LPCVD polysilicon gates, tungsten plugs via CVD. 2000s: High-k dielectrics drove ALD adoption (HfO2 replacing SiO2 at 45nm node). 2010s: ALD spacers, selective deposition. Trend: directional → conformal as features shrunk.
Abandoned Approaches: Electroplating for interconnects (rejected initially for non-uniformity, revived for copper damascene due to CVD copper challenges). Ion beam deposition (too slow). Laser ablation PVD (uniformity issues). CVD aluminum (TMA + H2 reduction, abandoned for particle issues, Al sputtering preferred).
Open Challenges & Novel Opportunities
Selective Deposition: Deposit only on desired surfaces (metal vs dielectric). Enables self-aligned processes, reduces patterning steps. Area-selective ALD (AS-ALD) via surface functionalization (SAMs), inhibitor molecules. Small molecule inhibitors (aniline, acetylacetone) show promise. Challenge: selectivity degrades with thickness, nucleation on non-growth surface. Opportunity: AI-designed inhibitors for specific material pairs, in-situ selectivity monitoring.
Sub-nm Thickness Control: For atomically thin channels (TMDs, graphene), interfaces. ALD promising but precursor design limiting. Opportunity: New precursors via computational chemistry, plasma-free alternatives.
Low Temperature Deposition: For back-end integration, heterogeneous integration (<400°C). PEALD, spatial ALD enabling progress. Challenge: film quality (density, impurities). Opportunity: Radical-enhanced ALD, photon-assisted ALD.
High Throughput ALD: Spatial ALD (moving substrate or gas curtains), batch ALD, roll-to-roll for flexible electronics. Beneq, SPTS demonstrating spatial tools. Opportunity: AI-optimized spatial reactor designs, multi-wafer spatial systems.
In-situ Monitoring: Real-time thickness, composition, crystal quality. RHEED for MBE, optical techniques (ellipsometry, reflectometry) for others. Opportunity: Machine learning for process control, predictive maintenance, film property prediction from deposition signatures.
Novel Materials: 2D materials (MoS2, WSe2), nitrides (AlN for GaN power), oxides (Ga2O3), perovskites. Each requires precursor development, process optimization. Opportunity: High-throughput experimentation with robotics, DFT-guided precursor design.
Moon-Based Fab Considerations
UHV Advantage: Native 10^-12 Torr eliminates pumping for PVD, MBE. No base pressure concerns, no chamber leaks, faster pumpdowns. Simplified vacuum hardware, no turbomolecular pumps. Enables continuous deposition across multiple processes without venting. Could maintain wafers in vacuum from deposition through final packaging, eliminating oxidation, contamination.
Volatiles Scarcity: CVD/ALD require H2, NH3, O2, hydrocarbons—all scarce on Moon. Recycling/capture essential. PVD advantages: only requires inert sputtering gas (could use recycled argon or helium-3 from regolith). Water from polar ice for oxygen, hydrogen. In-situ resource utilization for silicon, aluminum, titanium from regolith. Oxygen via electrolysis of regolith (ilmenite reduction).
Temperature Control: Easier temperature maintenance in vacuum (no convection), radiative cooling only. Enables very high or very low temp processes without chamber/heating complexity.
Target Materials: Lunar regolith contains Fe, Ti, Al, Si, Ca, Mg. Could produce sputtering targets in-situ. Aluminum (~14% in anorthosite highlands), titanium (ilmenite-rich maria), silicon (40% SiO2 in regolith). Refining to high purity (6N+) major challenge. Opportunity: Develop deposition processes tolerant of lower purity targets, or zone refining in microgravity/vacuum.
Vacuum Packaging: If chips run in vacuum, no need for passivation layers, can use vacuum as dielectric (infinite breakdown voltage). Hermetic sealing in native vacuum. Eliminates CVD oxide/nitride passivation steps. Enables simplified process flow.
Process Simplification: Focus on PVD-heavy process (eliminates CVD gas handling), sputter-deposited dielectrics instead of CVD. Use MBE for active layers (leverages UHV). Single-chamber multi-step processing without venting. Opportunity: Cluster tool in native vacuum, wafers never exposed to atmosphere.
Vibration Isolation: Superior seismic isolation benefits MBE, e-beam lithography alignment, but less critical for deposition which is relatively vibration-insensitive.
Contamination: No airborne particulates, water vapor. Cleanroom-free deposition in sealed environments. Challenge: outgassing from equipment, handling contamination.
Western Fab Competition Strategy
Equipment Sourcing: Most deposition tools from US (Applied Materials, Lam) or European/Japanese suppliers. Less China dependence than lithography. Opportunity: Vertical integration of commodity PVD tools (relatively simple), outsource ALD/epitaxy to established vendors.
Precursor Supply: European/US suppliers available but smaller scale than Asia. Opportunity: Long-term contracts, domestic precursor production (especially for ALD), synthetic chemistry partnerships.
Process Simplification: Minimize ALD use (throughput bottleneck), favor CVD where conformality sufficient. Use selective deposition to reduce patterning. Thicker barriers/liners where possible. Opportunity: AI-optimized CVD recipes to match ALD conformality, generative design for new CVD chemistries.
Chiplet Strategy: Deposition critical for hybrid bonding (ultra-smooth surfaces, CMP integration), micro-bumps (PVD barrier/seed), through-silicon vias (conformal liners). Opportunity: Specialize in deposition processes for advanced packaging, leverage this for chiplet ecosystem.
Vacuum Integration: Keep wafers in vacuum from deposition through bonding, eliminate cleans/contamination. Vacuum-insulated interconnects (no need for low-k dielectrics). Requires cluster tool design with all processes under vacuum. Opportunity: Radically simplified process flow, fewer steps, higher yield.
Cold Welding: Direct metal-metal bonding in vacuum at room temperature or low temps. Eliminates need for thick bonding layers, enables fine-pitch interconnects. Requires ultra-clean surfaces (native oxide removal). Opportunity: In-situ surface prep (light sputter clean) followed by bonding, all in vacuum cluster tool.
Talent: US deposition expertise at universities (Stanford, MIT, Berkeley), national labs (NREL, Sandia for ALD), former Intel/TSMC engineers. Europe strong in MBE (III-V), ALD (Finland/Netherlands). Recruit from equipment vendors (Applied, Lam), academic labs. Remote semiconductor talent from retiring engineers.
AI Opportunities: Vast parameter space (temperature, pressure, power, gas flows, time) for each deposition type. Reinforcement learning for multi-objective optimization (uniformity, stress, throughput). Generative models for precursor discovery. Computer vision for in-situ defect detection. Predictive maintenance from sensor fusion. Autonomous experimentation with robotic wafer handling. Opportunity: Order-of-magnitude faster process development, discovery of non-obvious process windows.
Simulation: COMSOL, Silvaco for CVD reactor modeling (gas flow, temperature, reaction kinetics). Atomistic models (DFT, MD) for ALD surface reactions, grain growth, stress evolution. Opportunity: Digital twin of deposition chamber for virtual process development, reduced experimental iterations. Combine with AI for closed-loop optimization.
Robotics: Automated wafer loading (already standard), but extend to target changes, chamber cleaning, metrology feedback. Robotic substrate handling in native vacuum for Moon fab. Opportunity: 24/7 operation, rapid recipe iteration, high-mix low-volume production for chiplets.
Mature Robotics Impact
Throughput: Eliminate manual wafer handling delays, optimize tool utilization. Parallel processing (multiple robots serving one tool). Faster target/source changes in PVD (currently manual, 4-8 hour downtime). Opportunity: 2-3x effective tool capacity via reduced idle time.
Complexity: Enable complex multi-step sequences that are manually impractical. Automated in-situ metrology between steps. Robotic transfer between vacuum chambers without venting. Opportunity: Processes with 10+ sequential depositions, ultra-thin multilayers.
Economics: Reduce labor (currently ~15% of fab opex). Enable smaller fabs (fewer tools with higher utilization). Reduce footprint (denser layouts). Opportunity: Economical specialty/low-volume production.
Scalability: Easier capacity expansion (add robots vs hiring/training). Rapid replication of recipes across tools. Opportunity: Fast fab ramp, reduced time-to-market for new products.
Quality: Eliminate human error in handling/contamination. Consistent process execution. Opportunity: Higher yields, especially for sensitive processes like ALD.
R&D Acceleration: High-throughput experimentation with combinatorial deposition (multiple conditions per wafer). Autonomous learning systems. Opportunity: Discover novel materials, processes 10-100x faster.
Creative/Abandoned/Novel Ideas
Ionized PVD: Plasma between target and substrate ionizes sputtered atoms, enabling magnetic steering for improved bottom coverage in vias. Developed 1990s-2000s, used in some Cu barrier applications. Opportunity: Revisit for advanced nodes with AI-optimized plasma/magnetic field design, extend to more materials.
Hot-wire CVD: Heated filament (1500-2000°C) dissociates precursor gases, enables low substrate temp. Used for a-Si solar cells. Abandoned in ICs due to uniformity, contamination. Opportunity: Localized deposition (single die), eliminate plasma damage, revisit with better filament materials (refractory carbides).
Liquid Injection CVD: Precursors delivered as aerosol/mist, enables non-volatile precursors. Challenge: droplet uniformity. Opportunity: High-throughput screening of liquid precursors, ultrasonic/inkjet nebulizers for better control.
Supercritical Fluid Deposition: Use scCO2 as solvent/transport. Excellent conformality, low temperature. Explored 2000s, limited adoption. Opportunity: Revival for porous low-k filling, sensitive 2D material deposition, combine with AI for recipe optimization.
Electrochemical ALD: Underpotential deposition for atomic layer control. Demonstrated for metals (Cu, Pt). Challenge: limited materials. Opportunity: Extend to oxides, nitrides via surface-limited reactions, aqueous processing.
Pulsed Laser Deposition (PLD): Laser ablates target, deposits highly energetic species. Used for complex oxides, superconductors. Poor uniformity at scale. Opportunity: Multi-beam systems for large area uniformity, combinatorial screening of new materials.
Molecular Layer Deposition (MLD): Organic/inorganic hybrid films via ALD-like process. Pure organic films possible. Explored for flexible electronics, low-k. Opportunity: Novel dielectrics, sacrificial layers, etch stops with tailored chemistry.
Filtered Cathodic Arc: Very high ionization (~100%), energetic deposition. Excellent adhesion, dense films. Macroparticle contamination. Opportunity: Electromagnetic filtering improvements, use for ultra-thin diffusion barriers, hard masks.
Selective Area Growth: Epitaxy only in patterned openings (dielectric mask). Demonstrated for III-V on Si. Challenge: mask compatibility, defects. Opportunity: Heterogeneous integration, eliminate epitaxy then etch, direct growth of nanowire arrays for 3D devices.
Vapor-Liquid-Solid Growth: Catalytic growth of nanowires/nanotubes. Gold catalyst droplet enables low-temp Si nanowire growth. Explored 2000s, contamination concerns. Opportunity: Alternative catalysts (Al, Ga), in-situ catalyst removal, direct integration for 3D NAND channels, GAA devices.
Atmospheric Pressure Spatial ALD: No vacuum, moving substrate under precursor zones separated by N2 curtains. Much higher throughput. Roll-to-roll for flexible. Opportunity: MEMS, sensors, packaging applications, revisit for IC periphery with improved gas curtain design.
Plasma-Enhanced MBE: Combine MBE precision with plasma activation for lower temps, new materials. Opportunity: GaN at lower temp, oxides without oxidizers.
Research Frontiers: Radical-enhanced ALD (independent control of reactants via plasma), photo-assisted ALD (UV activation), area-selective deposition via topography-selective precursors, quasi-ALD (non-self-limiting but highly conformal), super-conformal CVD (preferential bottom-up fill via additives), self-assembled monolayers as growth templates, atomic layer etching integration (etch+deposit cycles for surface smoothing), in-operando characterization (XPS, XRD during deposition for mechanistic insight).